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 R2A15908SP
5 Input Selector 2ch Electronic Volume with Tone & Surround
REJ03F0270-0100 Rev.1.00 Jan 25, 2008
Description
The R2A15908SP is an optimum audio signal processor IC for TV. It has a 5ch input selector with mono switch, surround, tone control (2band), input gain control and 2ch master volume. It can control all of these functions with I2C bus.
Features
* Volume 0 to -87dB, - / 1dB step Each channel is independent control. * 5 input selector + MUTE with mono switch * Input gain control 0dB to +20dB / 2dB step * Tone control Bass : -14dB to +14dB / 2dB step Treble : - 14dB to +14dB / 2dB step * Surround Low / High * Mode selector Bypass / Tone / Tone & Surround * I2C-bus control * Package SOP with 28 pin
Application
* Mini stereo, TV, etc.
Recommended Operating Condition
* Supply voltage ...... VCC = 9.0V (typ)
System Configuration
+
VCC=9V
IN L1 IN L2 IN L3 IN L4 IN L5
Mono /Stereo
VolumeL
Mode Selector
Input Gain Control Tone Control (Bass / Treble) Input Gain Control
VolumeR
LOUT
Surround
IN R1 IN R2 IN R3 IN R4 IN R5
ROUT
MCU
SCL SDA
Mode Selector
+
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 1 of 13
R2A15908SP
Block Diagram and Pin Configuration
INR5 INR4
1
Mode Selector
+ + -
28 27 26
Rch Bass/ Treble
ROUT LOUT TRER BASSR1 BASSR2 BASSL2 BASSL1 TREL
2 3
Input Selector Surround
INR3 INR2
INR1 INL1 INL2 INL3
5
Mute
Tone Control
4
25 24 23 22 21
7 8
Input Selector
INL4 INL5 IGOUTL VOLINL IGOUTR VOLINR
9 10
Input Gain Control
Tone Control
Mono /Stereo
Lch Bass/ Treble
6
20 19
MCU I/F Mute Volume
DGND
SDA SCL AGND REFIN
11 12 13 14
+ 0 to +20dB /2dB step 0 to -87dB,-
18 17
REF
+ -
0 to +20dB /2dB step
+ -
16 15
Volume
0 to -87dB, -
VCC
(Top view)
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 2 of 13
R2A15908SP
Application Example
1F
4.7F
INR5
1F
+ + +
1F
1
Mode Selector
+ + -
28
+
4.7F 47k
ROUT
INR4
1F
2 3
27 +
8200pF 47k
LOUT
INR3
26
Rch Bass/ Treble
Tone Control
INR2
+
Input Selector
Surround
4 5
Mute
25 24 23 22 21
0.068F 8.2k 0.068uF
1F
INR1
+
1F
1F
INL2
1F
+ + +
1F
7 8
Input Selector
Tone Control
Mono /Stereo
Lch Bass/ Treble
INL1
+
6
0.068F 8.2k 0.068F 8200pF
INL3
1F
INL4
9 10
Input Gain Control
20 19 SDA
MCU I/F Mute Volume
INL5
+
11
2.2F
+ 12 13
+ 0 to +20dB /2dB step
18 SCL 17
10F
REF
0 to -87dB, -
2.2F
+ 14
+ -
0 to +20dB /2dB step
+ -
16 15
+
Volume
0 to -87dB, -
VCC=9V
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 3 of 13
R2A15908SP
Equivalent Circuit of Pin Interface Block
Pin 1 2 3 4 5 6 7 8 9 10 Pin Name INR5 INR4 INR3 INR2 INR1 INL1 INL2 INL3 INL4 INL5 Equivalent Circuit
50k ref
11 13 27 28
IGOUTL IGOUTR LOUT ROUT
12 14
VOLINL VOLINR
R1
R2 ref
R1+R2=50k
18
SCL
19
SDA
Ack
50k
16
REFIN
50k
15 17 20
VCC AGND DGND
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 4 of 13
R2A15908SP
Pin Pin Name Equivalent Circuit
22 25
BASSR1 BASSL1
R3 R2
R2+R3=80k
R2
23 24 BASSR2 BASSL2
R3
R2+R3=80k
R1
21 26 TRER TREL
R2
R1+R2=30k
Absolute Maximum Ratings
Parameter Power supply Power dissipation Thermal derating Operating temperature Storage temperature Symbol VCC Pd K Topr Tstg Ratings 10 Unit V W mW / C C C Condition Ta 25C Ta > 25C (Circuit board installation)
-20 to +75 -40 to +125
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 5 of 13
R2A15908SP
Power on Reset
This IC built-in the power on reset function. The voltage of VREF-GND less than 2V, the serial DATA can not accept.
(V)
VREF - GND
2V
(S) Reset time After reset is canceled, the serial DATA can accept.
Release of reset.
I2C Bus Format
MSB LSB MSB LSB MSB LSB
S 1 bit
Slave Address 8 bit
A 1 bit
Sub Address 8 bit
A 1 bit
Data 8 bit
A 1 bit
P 1 bit
S: Starting Term A: Acknowledge Bit P: Stop Term If more than one Data Byte is transmitted, then the significant SUB ADDRESS bits are auto incremented. 00H 01H 02H 03H 04H00H
1. Slave Address
MSB LSB
1
0
0
0
0
0
1
R/WB
R/WB=0 : Write mode for register setting R/WB=1 : Not available
2. Sub Address Table
Sub Address 00H 01H 02H 03H 04H BIT D4 D3 D2 D1 <1>Lch Master volume <1>Rch Master volume <2>Input selector <3>Input gain <4>Stereo / Mono <5>Mode selector 0 0 0 <6>Tone control Bass <6>Tone control Treble D7 D6 D5 D0 0 0 0 0
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 6 of 13
R2A15908SP
3. Data Table
<1> Master Volume (Sub Address: 00H, 01H)
ATT 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB -16dB -17dB -18dB -19dB -20dB -21dB -22dB -23dB -24dB -25dB -26dB -27dB -28dB -29dB -30dB -31dB -32dB -33dB -34dB -35dB -36dB -37dB -38dB -39dB -40dB -41dB -42dB -43dB -44dB -45dB -46dB -47dB -48dB REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 7 of 13 Lch Rch Sub Address 00H 01H D7 D7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D6 D6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D5 D5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D4 D4 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 D3 D3 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 D2 D2 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 D1 D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
L ch R ch
Volume
R2A15908SP
ATT -49dB -50dB -51dB -52dB -53dB -54dB -55dB -56dB -57dB -58dB -59dB -60dB -61dB -62dB -63dB -64dB -65dB -66dB -67dB -68dB -69dB -70dB -71dB -72dB -73dB -74dB -75dB -76dB -77dB -78dB -79dB -80dB -81dB -82dB -83dB -84dB -85dB -86dB -87dB - Lch Rch Sub Address 00H 01H D7 D7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D6 D6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D5 D5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 D4 D4 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 D3 D3 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 D2 D2 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 D1 D1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1
L ch R ch
Volume
* It's initial setting when power is turned on.
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 8 of 13
R2A15908SP <2> Input Selector (Sub Address: 02H)
Setting IN1 IN2 IN3 IN4 IN5 MUTE D7 0 0 0 0 1 1 Input Selector D6 0 0 1 1 0 1 D5 0 1 0 1 0 1
<3> Input Gain (Sub Address: 02H)
Setting 0dB +2dB +4dB +6dB +8dB +10dB +12dB +14dB +16dB +18db +20dB Input Gain D4 0 0 0 0 0 0 0 0 1 1 1 D3 0 0 0 0 1 1 1 1 0 0 0 D2 0 0 1 1 0 0 1 1 0 0 1 D1 0 1 0 1 0 1 0 1 0 1 0
<4> Stereo / Mono Selector (Sub Address: 03H)
Setting Stereo Lch Mono Rch Mono Mode Selector D7 0 0 1 D6 0 1 0
<5> Mode Selector (Sub Address: 03H)
Setting Bypass Tone Tone & Surround Hi Tone & Surround Low Mode Selector D5 0 0 1 1 D4 0 1 0 1
* It's initial setting when power is turned on.
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 9 of 13
R2A15908SP <6> Tone control (Sub Address: 04H)
Gain Bass Treble 0dB 2dB 4dB 6dB 8dB 10dB 12dB 14dB D7 D3 D6 D2 0 0 0 0 1 1 1 1 D5 D1 0 0 1 1 0 0 1 1 D4 D0 0 1 0 1 0 1 0 1
A
If A = 0 means Tone control gain CUT(-), then A = 1 means Tone control gain BOOST(+). * It's initial setting when power is turned on.
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 10 of 13
R2A15908SP
Electrical Characteristics
(VCC = 9V, Ta = 25C, Vi = 100mVrms, f = 1kHz, Tone control = 0dB, Rg = 600, RL = 47k) General Characteristics
Parameter Operational power supply Supply current Reference voltage Input impedance Maximum output voltage Volume maximum Volume minimum Channel balance Total harmonic distortion Input selector cross talk Channel separation Output noise 1 Output noise 2 Symbol Min 4.75 -- 4.0 35 -- -2 -- -1.5 -- -- -- -- -- Limits Typ 9.0 15 4.5 50 2.5 0 -100 0 0.01 -100 -100 30 5 Max 9.7 25 5.0 65 -- +2 -90 1.5 0.5 -70 -70 50 15 Unit V mA V k Vrms dB dB dB % dB dB Vrms Vrms Condition
VCC ICC Vref RIN VOM VOLmax VOLmin CBAL THD CT CS Vno1 Vno2
No signal No signal VOL = 0dB, THD = 1% VOL = 0dB VOL = Mute, Vin = 1Vrms, IHF-A VOL = 0dB 400Hz to 30kHz BPF, Vo = 0.5Vrms 400Hz to 30kHz BPF Vin = 1Vrms 400Hz to 30kHz BPF Vin = 1Vrms VOL = 0dB, Input gain = 0dB Tone = 0dB, Surround = Low, IHF-A VOL = Mute, Input gain = 0dB Bypass, IHF-A
Tone Control
Parameter Tone control voltage gain (Boost/ Bass) Tone control voltage gain (Cut/ Bass) Tone control voltage gain (Flat/ Bass) Tone control voltage gain (Boost/ Treble) Tone control voltage gain (Cut/ Treble) Tone control voltage gain (Flat/ Treble) Symbol G(Bass)B G(Bass)C G(Bass)F G(Treble)B G(Treble)C G(Treble)F Min +11.5 -16.5 -2 +11.5 -16.5 -2 Limits Typ +14 -14 0 +14 -14 0 Max +16.5 -11.5 +2 +16.5 -11.5 +2 Unit dB dB dB dB dB dB Condition f = 100Hz, Bass = +14dB f = 100Hz, Bass = -14dB f = 100Hz, Bass = 0dB f = 10kHz, Tre = +14dB f = 10kHz, Tre = -14dB f = 100Hz, Tre = 0dB
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 11 of 13
R2A15908SP
Bus Line Timing Specification
tR, tF tBUF VIL SDA VIH
tHD: STA VIL SCL VIH
tSU: DAT
tHD: DAT
tSU: STA
tSU: STO
tLOW S tHIGH S P S
Parameters Min input low voltage Max input high voltage SCL clock frequency Time the bus must be free before a new transmission can start Hold time start condition. After this period the first clock pulse is generated The Low period of the clock The High period of the clock Set-up time for start condition (Only relevant for a repeated start condition) Hold time DATA Set-up time DATA Rise time of both SDA & SCL lines Fall time of both SDA & SCL lines Set-up time for stop condition
Symbol VIL VIH fSCL tBUF tHDSTA tLow tHigh tSU: STA tHD: DAT tSU: DAT tR tF tSU: STO
Min 0 3.0 -- 4.7 4.0 4.7 4.0 4.7 0 250 -- -- 4.0
Max 1.5 5.0 100 -- -- -- -- -- -- -- 1000 300 --
Units V V kHz s s s s s s ns ns ns s
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 12 of 13
R2A15908SP
Function Description
1. Tone Control <1> Bass Circuit
R1=8.2k C1=C2=0.068F (Hz)
Setting [dB] R2[] R3[]
Boost
IN R3
+ R2
OUT
fo = 2 Q~ = 1
1 R1(R2+R3) C1C2 C1C2R2 R1
0
0 19820 35570 48040 58020 65910 72190 77170
80000 60180 44430 31920 21980 14090 7810 2830
C1+C2
(R3=0)
2 4 6 8 10 12
C1 R1 Cut IN
C2
R2+R3 +2 R1 Gv = 20log (dB) R3 +2 R1 (C1=C2) 1 R1(R2+R3)C1C2 C1C2R2 R1
+ -
OUT R2 R3
fo = 2 Q~ =
(Hz)
14
1 C1+C2
(R3=0)
C2 R1
C1
R3 +2 R1 Gv = 20log R2+R3 +2 R1
(dB) (C1=C2)
<2> Treble Circuit
Boost IN R1 C=8200pF OUT
Setting [dB] R1 [] 30000 23810 18890 14970 11850 9350 7340 5730 R2 [] 0 6190 11110 15030 18150 20650 22660 24270
+ R2
Av= 20log
C
{ C(R1+R2)} +1 (CR12 ) +1 *=2f
(dB)
2
0 2 4 6 8
Cut IN
+ -
10
OUT R2 R1
12 14
Av= 20log
C
(CR1 ) 2+1 { C(R1+R2)}2 +1 (dB) *=2f
REJ03F0270-0100 Rev.1.00 Jan 25, 2008 Page 13 of 13
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When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document, please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com ) 5. 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